WHAT IS MOORE’S LAW?
Moore’s law is nothing but a prediction made by the Gordon Moore in year 1965 that the no. of transistors in IC would double every two years which would increase speed and capability of computer every two years and their prices would drop, their growth would be exponential.
Let’s compare intel’s first micro-processor with the latest one -
Intel 4004 has 2300 transistors with a process node of 10um and the latest processor has millions of transistors with a process node of 14nm. So, if we look into the progress, the performance has increased by 3500 times, energy efficiency has improved by 90000 times & price per transistor has reduced by 60000 times.
IMPACT OF MOORE’S LAW
· Moore’s law had a great impact on the semiconductor industry, Moore’s law was used by the semiconductor industry for long term planning and to set targets for R&D.
· It also inspired advances in miniaturization and kept multiplying the computing power of chips.
· Companies and engineers saw the benefits of Moore’s law and did their best to keep it going.
· Many other technological changes — like the smartphone, decoding human gene, or various development.
LIMITS OF MOORE’S LAW
As we know that no. of transistors into an IC are increasing and their sizes are decreasing, so adding more transistors onto a chip raises the issue of quantum tunneling which causes current leakage. The more transistors there are on a chip, the more heat it produces and the greater the chance of a malfunction.
VLSI FABRICATION TECHNIQUES
A number of processing technologies are available, the majority of the production is done with CMOS.
Other processes are limited to areas where CMOS is not very suitable, like the high-speed RF applications.
The CMOS technology
An Integrated Circuit (IC) is an electronic network fabricated in a single piece of semiconductor material. The semiconductor surface is subjected to various processing steps in which impurities and other materials are added with specific geometrical patterns.
The fabrication steps are sequenced to form three dimensional regions that act as transistors and interconnects that form the network. The CMOS process allows the fabrication of nMOS and pMOS transistors side-by-side on the same silicon substrate.
Fabrication process sequence :
· Silicon manufacture
In silicon manufacture, pure silicon is melted in a pot (1400º C) and a small seed containing the desired crystal orientation is inserted into molten silicon. Then it is slowly(1mm/minute) pulled out.
· Wafer processing- Wafer processing involves the following steps:
o Lithography- The process for pattern definition by applying thin uniform layer of viscous liquid (photo-resist) on the wafer surface. The photo-resist is hardened by baking and than selectively removed by projection of light through a reticle containing mask information.
1.Designer: Drawing the “layer” patterns on a layout editor
2.Silicon Foundry: Masks generation from the layer patterns in the design data base.
3.Printing: transfer the mask pattern to the wafer surface.
4.Process the wafer to physically pattern each layer of the IC.
o Oxide growth and removal- In this step, SiO2is deposited on materials other than silicon through reaction between gaseous silicon compounds and oxidizers.
o Etching- It is the process of selective removal of regions of a semiconductor, metal, or silicon dioxide. There are two types of etchings: wet and dry.
o Diffusion and ion implantation- Most of these diffusion processes occur in two steps: the pre-deposition and the drive-in diffusion.
In ion implantation, to generate ions, such as those of phosphorus, an arc discharge is made to occur in a gas, such as phosphine (PH3),that contains the dopant. The ions are then accelerated in an electric field so that they acquire an energy of about 20keV and are passed through a strong magnetic field. Because during the arc discharge unwanted impurities may have been generated, the magnetic field acts to separate these impurities from the dopant ions based on the fact that the amount of deflection of a particle in a magnetic field depends on its mass. Following the action of the magnetic field, the ions are further accelerated so that their energy reaches several hundred keV, whereupon they are focused on and strike the surface of the silicon wafer.
o Annealing- In thermal annealing, a high temperature process allows doping impurities to diffuse further into the bulk and repairs lattice damage caused by the collisions with doping ions.
o Silicon deposition- In this step, films of silicon can be added on the surface of a wafer.
o Metallization- Here, deposition of metal layers by evaporation is done.
· Testing- Finally the testing of IC is done.
· Assembly and packaging
REFERENCES:
https://learninglink.oup.com/protected/files/content/file/1579527456648-Sedra8e_AppA.pdf
Microsoft Word — om.doc (asctbhopal.com)
3 IC Fabrication Process Steps (tuwien.ac.at)
AUTHORS:
Swaraj Mane(02)
Shaurya Mhaske(05)
Mitul(06)
